| 95 |
積電專班 |
鄭仲超 |
A fast-convergence decoding method and memory- efficient VLSI decoder architecture for LDPC codes in IEEE 802.16e standard |
| 95 |
積電專班 |
簡輔辰 |
Study on the Decoding Algorithms for LDPC Codes Constructed from Euclidean Geometry |
| 96 |
電機所 |
吳宗晟 |
An LDPC decoder with low area complexity for mobile WiMAX |
| 96 |
電機所 |
吳承恩 |
Memory access for QC-LDPC decoder with fast convergence speed |
| 96 |
電機所 |
林俊宇 |
A fast-convergence MIMO-BICM scheme |
| 96 |
電機所 |
蘇柏憲 |
A study of PAPR-reduction techniques for turbo coded MIMO-OFDM systems |
| 96 |
電機所 |
郭昌翰 |
A novel turbo equalization scheme for interference channels |
| 96 |
電機所 |
陳本敖 |
An Efficient LT-code based Hybrid ARQ Scheduling Scheme for Broadcast Communication Systems |
| 97 |
電機所 |
林琦祐 |
Performance improvement of LDPC coded systems by dynamic scheduling and selective mapping |
| 97 |
電機所 |
趙英辰 |
A Codeword-Interleaved Transmission/Receiving Scheme for Noncoherent Communication |
| 97 |
通訊所 |
陳春榮 |
An LDPC decoder using vertical shuffled scheduling and early termination |
| 97 |
電機所 |
羅啟倫 |
ARQ algorithms using 1-bit acknowledgement against erasure channels for Growth codes based on multicast communication |
| 97 |
電機所 |
王冠傑 |
A multi-mode decoder architecture for RS-LDPC codes |
| 97 |
電機所 |
張家豪 |
Performance improvements for LDPC coded systems |
| 97 |
電機所 |
廖哲偉 |
A high-throughput decoder architecture for irregular LDPC codes |
| 98 |
電機所 |
汪宇倫 |
Processing-task Arrangement for a Low-complexity Full-mode WiMAX LDPC Codec |
| 98 |
通訊所 |
葉繕銘 |
Dynamic Scheduling Algorithms Using Modified Residual Belief Propagation for UEPLDPC Codes |
| 98 |
電機所 |
彭建濂 |
A scheduling Algorithm for Higher-throughput Efficient Multi-mode G.hn LDPC decoder |
| 98 |
電機所 |
梁振業 |
An Efficient Layered Decoding Architecture Using Selective Algorithm for Non-Binary QC-LDPC Codes |
| 99 |
電機所 |
甘禮昇 |
Jointly Designed Architecture-Aware LDPC Convolutional Codes and Its Memory-based Parallel Shuffled Decoder Architecture |
| 99 |
電機所 |
蘇忠政 |
Jonit non-coherent detection and side-information extraction for lower-compleity PTS-based OFDM systems |
| 99 |
電機所 |
葉芷芸 |
Scheduling Techniques for Rateless Codes using Belief Propagation Decoding |
| 99 |
通訊所 |
蕭浩中 |
LDPC coded noncoherent space-time modulation using information-bearing pilot and spacial multiplexing |
| 99 |
電機所 |
賴韋旻 |
Distributed Unitary Space-Time Modulation Schemes Using Raptor Codes |
| 100 |
電機所 |
楊柏彰 |
Hardware-friendly Shuffled Message Passing Decoding with Application to Efficient Multi-standard LDPC Decoder Design |
| 100 |
電機所 |
吳立夫 |
A high-throughput LDPC decoder architecture using idle-cycle-free shuffled scheduling |
| 100 |
電機所 |
翁晟佑 |
A soft-input-soft-output Chase decoder architecture using distance-based decoding |
| 100 |
電機所 |
陳嘉緯 |
Look-Up Table Based Differential Modulation Using LDCs for Block Fading Channel |
| 100 |
電機所 |
羅浩綸 |
Rateless-coded Cooperative Transmission Schemes Using Full-duplex DF and CF Protocols |
| 101 |
電機所 |
陳書偉 |
An Error-Floor Lowering technique for Non-binary QC-LDPC Codes |
| 101 |
電機所 |
黃亭潁 |
An energy-efficient dual-mode soft-decision BCH decoder for wireless body area network |
| 101 |
電機所 |
廖國軒 |
A High-Throughput Trellis-Based Layered Decoding Architecture for Non-binary LDPC Codes Using Max-Log-QSPA |
| 101 |
電機所 |
楊政達 |
A Fully-Parallel LDPC Decoder Architecture Using Probabilistic Min-Sum Algorithm for High-Throughput Applications |
| 101 |
電機所 |
彭祥恩 |
A minimal-trellis-module based searching method for convolutional codes |
| 101 |
電機所 |
詹志偉 |
Generator matrix design and degree-oriented scheduling for the fast convergence of rateless codes |
| 101 |
電機所 |
李茂睿 |
Time-Domain Minimum-Value Finders for LDPC Applications |
| 102 |
電機所 |
陳冠群 |
Bit-interleaved Coded Differential Modulation Schemes for Correlated Fading Channels |
| 102 |
電機所 |
吳維軒 |
Design and Implememtation of an Iterative Detection and Decoding Receiver for LDPC coded MIMO Systems |
| 102 |
電機所 |
胡鈞凱 |
A Reduced-Complexity Layered Decoder Architecture for High Rate QC-LDPC Codes |
| 102 |
電機所 |
周學志 |
A Low-Complexity LDPC Codec for NAND Flash Memory |
| 102 |
電機所 |
施建亨 |
LDPC Coded Modulation and Its Applications to MLC Flash Memory |
| 102 |
電機所 |
蔡杰廷 |
Two Constructions of Permutation-based QC-LDPC Codes |
| 102 |
電機所 |
陳煜昕 |
Sensor Clustering Based Cooperative Information Aggregation Schemes for Distributed Estimation in Wireless Sensor Network |
| 102 |
電機所 |
方鋮宇 |
A Compressive Sensing Scheme of Image Sensing and Recovering for Single-Pixel Camera |
| 103 |
電機所 |
謝杰燊 |
A Hardware-friendly Error- floor Lowering Technique for High-rate QC-LDPC Codes |
| 103 |
電機所 |
周柏均 |
A study on soft feature extraction for iris authentication using error correcting code and hidden Markov model |
| 103 |
電機所 |
楊政哲 |
Constructions of QC-LDPC Code Based on Masking and PDF |
| 103 |
電機所 |
侯盈吉 |
Implementation of Flexible QC-LDPC codec on FPGA |
| 103 |
通訊所 |
吳秉澐 |
Spatial Coupling of Polar Codes |
| 103 |
通訊所 |
林祺富 |
LDPC-coded Generalized Space Shift Keying schemes for Massive MIMO Systems |
| 103 |
電機所 |
黃冠勳 |
Iterative Soft-decision Decoding of Reed-Solomon Codes Using Informed Dynamic Scheduling |
| 104 |
通訊所 |
官亭宇 |
A Hardware Design of LDPC Coded Modulation Scheme for Flash Memory Applications |
| 104 |
通訊所 |
陳楚天 |
A Shuffled LDPC Decoder Architecture for Error-Floor Evaluation |
| 104 |
電機所 |
黃亦村 |
Constructions of RC-LDPC Code Based on Splitting and Extending |
| 104 |
電機所 |
周柏橋 |
An Efficient Layered Decoder Architecture with Error-Floor Lowering Technique for High-Rate QC-LDPC Codes |
| 104 |
電機所 |
黃俊傑 |
A modified belief propagation algorithm and hardware architecture for polar codes |
| 104 |
電機所 |
蘇詠翔 |
Dynamic Scheduling for Rate-Compatible LDPC Convolutional Codes |
| 104 |
電機所 |
林柏華 |
Application of LDPC Coded Modulation to NAND Flash |
| 104 |
通訊所 |
林柏諺 |
Performance Evaluation of LDPC coded 8-PAM using FPGA |
| 104 |
電機所 |
李易學 |
Low-complexity Generalized Spatial Modulation Schemes Using Codeword-assisted Massive MIMO Detectors |
| 105 |
電機所 |
王鈞毅 |
A Collaborated Stochastic LDPC Decoder Architecture with Effective Probability Tracer |
| 105 |
電機所 |
吳俊翰 |
A Near Maximum-Likelihood Soft-Decision Decoding Algorithm For Reed-Solomon Codes |
| 105 |
通訊所 |
蔡宗霖 |
A Hardware-Friendly Expediting Belief Propagation Decoding for Polar Codes |
| 105 |
通訊所 |
林千竣 |
A spatial-coupled sparse code multiple access scheme |
| 105 |
電機所 |
黃弘任 |
Hardware design for non-binary LDPC decoders |
| 105 |
通訊所 |
王俊清 |
Rate-compatible (RC) LDPC coding |
| 106 |
電機所 |
莊立珉 |
A Modefied Gradient Descent Bit Flipping Decoding Scheme for LDPC Codes |
| 106 |
電機所 |
吳則諺 |
Design of Protograph-based LDPC coded Modulation using IDD receiver |
| 106 |
電機所 |
洪偵量 |
A* Decoding of Polar Codes |
| 106 |
電機所 |
李立中 |
LDPC Encoder and Decoder Design for the Next Generation Communication and Storage Systems |
| 107 |
電機所 |
鮑榆昇 |
An Early Termination Scheme for SCL-based Polar Decoder |
| 107 |
電機所 |
梁慶儀 |
Hardware-friendly LDPC Decoding Scheduling for 5G HARQ |
| 107 |
電機所 |
張毅勤 |
An Efficient Successive Cancellation List Decoder for Polar Codes |
| 107 |
通訊所 |
鄭柏偉 |
Deep Learning Aided Sequential Reliability-Boosting Belief Propagation List Decoding for Polar Codes |
| 107 |
通訊所 |
林禹菲 |
Stock Index Forecast via a Recurrent Neural Network Base on the Zero-Crossing Rate Approach |
| 107 |
電機所 |
王楷昕 |
A Study of Improving Polar Codes by Spatial Coupling |
| 107 |
電機所 |
高庭國 |
Implementation of Error Control Coding for Digital Wireless Microphones |
| 107 |
電機所 |
羅明益 |
An Offline Signature Verification System Based on Deep Siamese Neural Networks |
| 107 |
電機所 |
蘇侑晨 |
Seal Imprint Verification Using SVM and Edge Difference |
| 107 |
電機所 |
林鈺恆 |
Post Processing for CRC-aided List Successive Cancellation Polar Decoding |
| 108 |
電機所 |
紀証壹 |
A Successive Cancellation List Decoding Using Variable List Sizes for Polar Codes |
| 108 |
通訊所 |
鄭佳昇 |
Design of SCMA Schemes with Balanced BER and PAPR Performances |
| 108 |
電機所 |
李欣佑 |
A Bit-Reliability Based Node-Wise List Successive Cancellation Polar Decoder with Post Processing |
